Via transition modeling and charge replenishment of the power delivery network in multilayer PCBs

In the first article of this thesis, the charge delivery in the power distribution network for printed circuit board has been analyzed in the time-domain. Performing all the simulations and analyzing the PDN physics and modeling, I contributed to a better understanding of the time-domain decoupling mechanism. The second paper studies the noise coupling sing a segmentation approach combined with a via-to-antipad capacitance model and a plane-pair cavity model. Building equivalent circuit models as well as analyzing design strategies, I contributed to a new approach for the PDN analysis in multilayer PCBs. The third article discusses how to estimate the amount of current needed for large ICs and how to evaluate the amount of noise voltage due to this current draw. After accurate discussion of the design strategies, I modeled and simulated the free evolution of a charged PCB with and without decoupling capacitors. The depletion of charges stored between the power buses in time and frequency-domain has been investigated as a function of the plane thickness, SMT decoupling closeness in the fourth paper. With my contribution, the time and frequency-domain in the PDN have been related using circuit approach. In the fifth paper, I analyzed a 26-layer printed circuit board performing milling, measurements and building circuit models. It is the first time that the segmentation approach has been used for differential geometry. In addition, Debye materials have been implemented in the cavity model --Abstract, page iv

Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages

The via-plate capacitance for a via transition to a multilayer printed circuit board is evaluated analytically in terms of higher order parallel-plate modes. The Green\u27s function in a bounded coaxial cavity for a concentric magnetic ring current is first derived by introducing reflection coefficients for cylindrical waves at the inner and outer cavity walls. These walls can be perfect electric conductor (PEC)/perfect magnetic conductor(PMC) or a nonreflective perfectly matched layer. by further assuming a magnetic frill current on the via-hole in the metal plate, an analytical formula is derived for the via barrel-plate capacitance by summing the higher order modes in the bounded coaxial cavity. The convergence of the formula with the number of modes, as well as with the radius of the outer PEC/PMC wall is discussed. The analytical formula is validated by both quasi-static numerical methods and measurements. Furthermore, the formula allows the investigation of the frequency dependence of the via-plate capacitance, which is not possible with quasi-static methods

Mutual External Inductance in Stripline Structures

The Method of Edge Currents (MEC) proposed in our previous paper [1] is applied herein for calculating the mutual external inductance associated with fringing magnetic fields that wrap ground planes of a stripline structure. This method employs a quasi-static approach, image theory, and direct magnetic field integration. The resultant mutual external inductance is frequency-independent. The approach has been applied to estimating mutual inductance for both symmetrical and asymmetrical stripline structures. Offset of the signal trace from the centered position both in horizontal and vertical directions is taken into account in asymmetrical structures. The results are compared with numerical simulations using the CST Microwave Studio Software

Differential Vias Transition Modeling in a Multilayer Printed Circuit Board

A 26-layer printed circuit board including several test sites has been analyzed. All the sites have a transition from coupled microstrips to coupled striplines through signal vias. Differential measurements have been performed on some of these test sites to estimate the effect on S-parameters and eye diagrams due to via and antipad radius variation, and different lengths of via stub. The focus of this paper is on a test site with a transition from top to the sixth layer. At the same time, a physics based circuit model has been assembled in a spice-based simulation tool and a full-wave model has been generated as well. The paper will show that the process of modeling can require a series of adjustments to get reasonable results. A brief discussion about possible issues associated with fabrication tolerances is presented in the last chapter

Method of Edge Currents for Calculating Mutual External Inductance in a Microstrip Structure

Mutual external inductance (MEI) associated with fringing magnetic fields in planar transmission lines is a cause of socalled ground plane noise , which leads to radiation from printed circuit boards in high-speed electronic equipment. Herein, a Method of Edge Currents (MEC) is proposed for calculating the MEI associated with fringing magnetic fields that wrap the ground plane of a microstrip line. This method employs a quasi-magnetostatic approach and direct magnetic field integration, so the resultant MEI is frequency independent. It is shown that when infinitely wide ground planes are cut to form ground planes of finite width, the residual surface currents on the tails that are cut off may be redistributed on the edges of the ground planes of finite thickness, forming edge currents. These edge currents shrink to filament currents when the thickness of the ground plane becomes negligible. It is shown that the mutual external inductance is determined by the magnetic flux produced by these edge currents, while the contributions to the magnetic flux by the currents from the signal trace and the finite-size ground plane completely compensate each other. This approach has been applied to estimating the mutual inductance for symmetrical and asymmetrical microstrip lines

Early Time Charge Replenishment of the Power Delivery Network in Multi-Layer PCBs

The investigation of decoupling issues has been extensively treated in the literature in both the frequency and the time domain [1-9]. The two domains describe from different perspectives the same physical phenomenon, being related by a Fourier transform. In this article, well known decoupling issues usually addressed in the frequency domain [1,2] are discussed in the time domain. Moreover, some modeling issues related to the cavity model approach are discussed and, in particular, the circuit extraction feature associated with this methodology is utilized throughout the article to carry out the time domain simulations within a SPICE based-tool. The depletion of charges stored between the power bus is investigated in the time domain as a function of the plane thickness, SMT decoupling closeness and interconnect inductance values

Noise Coupling Between Power/Ground Nets Due to Differential Vias Transitions in a Multilayer PCB

Due to the increase in board density, routing traces on different layers becomes a widely used strategy. Through-hole vias are often used to connect these traces. Those vias that penetrate power/ground plane pairs could cause noise coupling between signal and power/ground nets. At the same time, the need for clean signal transmitted to receivers results in a wide use of differential signals. This paper studies the noise coupling mechanism caused by a differential pair of vias penetrating power/ground plane pair using a physics-based via-plane model combined with transmission line models for traces. A 26-layer printed circuit board with a pair of differential vias have been modeled. The simulated results clearly demonstrate the impact of ground vias and via stubs on noise coupling

System Level PDN Impedance Optimization Utilizing the Zeros of the Decoupling Capacitors

System-Level Power Distribution Network (PDN) Impedance Optimization Utilizing the Zeros of the Decoupling Capacitors (Decaps) is Discussed in This Paper. an Example of a Practical PDN Application is Proposed to Validate the Poles and Zeros Algorithm (P&Z) Presented. the System-Level PDN is with the Printed Circuit Board (PCB), Package (PKG), and Chip, as Well as the Low-Frequency Decaps on the PCB and the On-PKG Decoupling Capacitors. the PDN Optimization Results Are Compared with Those from the Genetic Algorithm (GA) to Show the Reasonableness and Validity of the P&Z Algorithm

Time-Domain Simulation of System Interconnect Using Convolution and Newton-Raphson Iteration Methods

In today’s world electronic system interconnections, commonly called channels, are routed over packages and printed circuit boards and are characterized by measuring eyes and calculating the bit error rate (BER). Many factors such as jitter, inter-symbol interference, simultaneous switching noise and crosstalk impact the BER of an interconnection. In the design phase, it is common practice to use circuit simulation to guarantee an acceptable BER level. This is done by acquiring the voltage waveform at the input of the receiver circuit in a robust statistical manner using time domain simulations. The possible time-domain simulation techniques can be classified in two ways: a transient solver (e.g., ASTAP, Spice) which uses non-linear Newton-Raphson iteration methods, and another second technique based on linea